Make rx/dragonx the primary algo name (rx/hush kept as alias)

Wire parity with miner113/xmrig: the algo string reported and sent in
submits is now rx/dragonx; rx/hush, randomx/dragonx, dragonx, etc. remain
accepted aliases so existing configs keep working.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

build-validate/CMakeFiles/xmrig-asm.dir/ASM.includecache

@@ -0,0 +1,60 @@
+#IncludeRegexLine: ^[ 	]*[#%][ 	]*(include|import)[ 	]*[<"]([^">]+)([">])
+
+#IncludeRegexScan: ^.*$
+
+#IncludeRegexComplain: ^$
+
+#IncludeRegexTransform: 
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/CryptonightR_soft_aes_template.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/CryptonightR_template.S
+CryptonightR_template.inc
+/home/dev/drg-xmrig/src/crypto/cn/asm/CryptonightR_template.inc
+CryptonightR_soft_aes_template.inc
+/home/dev/drg-xmrig/src/crypto/cn/asm/CryptonightR_soft_aes_template.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/CryptonightR_template.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn1/cnv1_double_main_loop.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn1/cnv1_quad_main_loop.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn1/cnv1_single_main_loop.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_double_main_loop_sandybridge.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_main_loop_bulldozer.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_main_loop_ivybridge.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_main_loop_ryzen.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_rwz_double_main_loop.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_rwz_main_loop.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_upx_double_mainloop_zen3.inc
+
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn_main_loop.S
+cn1/cnv1_single_main_loop.inc
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn1/cnv1_single_main_loop.inc
+cn1/cnv1_double_main_loop.inc
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn1/cnv1_double_main_loop.inc
+cn1/cnv1_quad_main_loop.inc
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn1/cnv1_quad_main_loop.inc
+cn2/cnv2_main_loop_ivybridge.inc
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_main_loop_ivybridge.inc
+cn2/cnv2_main_loop_ryzen.inc
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_main_loop_ryzen.inc
+cn2/cnv2_main_loop_bulldozer.inc
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_main_loop_bulldozer.inc
+cn2/cnv2_double_main_loop_sandybridge.inc
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_double_main_loop_sandybridge.inc
+cn2/cnv2_rwz_main_loop.inc
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_rwz_main_loop.inc
+cn2/cnv2_rwz_double_main_loop.inc
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_rwz_double_main_loop.inc
+cn2/cnv2_upx_double_mainloop_zen3.inc
+/home/dev/drg-xmrig/src/crypto/cn/asm/cn2/cnv2_upx_double_mainloop_zen3.inc
+