RISC-V Intergration

2025-10-22 18:57:20 +02:00
parent c56fc2e989
commit b53008fed6
30 changed files with 3620 additions and 20 deletions
--- a/src/backend/cpu/cpu.cmake
+++ b/src/backend/cpu/cpu.cmake
@@ -46,7 +46,12 @@ else()
    set(CPUID_LIB "")
 endif()

-if (XMRIG_ARM)
+if (XMRIG_RISCV)
+    list(APPEND SOURCES_BACKEND_CPU
+        src/backend/cpu/platform/lscpu_riscv.cpp
+        src/backend/cpu/platform/BasicCpuInfo_riscv.cpp
+    )
+elseif (XMRIG_ARM)
    list(APPEND SOURCES_BACKEND_CPU src/backend/cpu/platform/BasicCpuInfo_arm.cpp)

    if (XMRIG_OS_WIN)