This website requires JavaScript.
Explore
Help
Sign In
DragonX
/
drg-xmrig
Watch
1
Star
0
Fork
0
You've already forked drg-xmrig
Code
Issues
Pull Requests
Actions
Packages
Projects
Releases
2
Wiki
Activity
Files
6d01860812aa99254ae59f3f38fe24d9a043e388
drg-xmrig
/
src
/
backend
/
cpu
/
platform
History
SChernykh
5af50b854c
RandomX: added cache QoS support
...
False by default. If set to true, all non-mining CPU cores will not have access to L3 cache.
2020-07-13 17:23:18 +02:00
..
AdvancedCpuInfo.cpp
KawPow WIP
2020-05-27 16:19:57 +02:00
AdvancedCpuInfo.h
ICpuInfo refactoring.
2020-05-08 22:25:13 +07:00
BasicCpuInfo_arm.cpp
Removed code duplicate.
2020-05-09 01:13:46 +07:00
BasicCpuInfo.cpp
RandomX: added cache QoS support
2020-07-13 17:23:18 +02:00
BasicCpuInfo.h
RandomX: added cache QoS support
2020-07-13 17:23:18 +02:00
HwlocCpuInfo.cpp
KawPow WIP
2020-05-27 16:19:57 +02:00
HwlocCpuInfo.h
ICpuInfo refactoring.
2020-05-08 22:25:13 +07:00