Commit Graph
48 Commits
Author SHA1 Message Date
SChernykh e766e11dfa RandomX (Arqma variant) support 2019-10-08 19:00:19 +02:00
XMRig d7ae457325 Added class NUMAMemoryPool. 2019-10-07 20:39:04 +07:00
XMRig b7398ad9fa Fixed exit condition for RxQueue. 2019-10-06 11:19:32 +07:00
XMRig 3d262d82a0 Added class RxQueue, class Rx now thin static wrapper on top of RxQueue. 2019-10-06 07:47:41 +07:00
XMRig 5058da3f29 Fixed exit. 2019-10-05 11:24:22 +07:00
XMRig 717e13818f Implemented RxNUMAStorage. 2019-10-05 08:24:28 +07:00
XMRig 93a70f4bbe Added RxNUMAStorage stub. 2019-10-04 18:43:03 +07:00
XMRig 473b98ae68 Extended "numa" option for RandomX. 2019-10-04 10:49:55 +07:00
XMRig f9f5b8a716 Added interface IRxStorage and RxBasicStorage class. 2019-10-04 08:45:13 +07:00
XMRig 8b14b414a4 More cleanup. 2019-10-03 07:45:25 +07:00
XMRig 4a80dfa349 Added class RxSeed. 2019-10-03 04:48:36 +07:00
XMRig c452846a6a #1212 Fixed RandomX dataset re-initialization. 2019-10-02 06:35:49 +07:00
XMRig dea1f983f0 Merge branch 'dev' into evo 2019-10-01 07:26:18 +07:00
XMRig aaddfbe779 Fixed support for systems where total count of NUMA nodes not equal usable count. 2019-10-01 07:19:13 +07:00
SChernykh 46ef04a4cf Added JIT compiler for RandomX on ARMv8 2019-09-21 10:10:52 +02:00
XMRig 26e3d541b2 Use RxAlgo:base instead of switch. 2019-09-14 12:00:33 +07:00
XMRig a3e66e94cf Fix compile warning, mostly struct/class inconsistency. 2019-09-13 18:21:05 +07:00
XMRig 1699443520 Merge branch 'dev' into feature-opencl 2019-09-12 13:16:42 +07:00
XMRig 9428659e72 Implemented OpenCL JIT mode. 2019-09-12 13:10:50 +07:00
XMRig 5dfe4ec100 Fixed invalid shares. 2019-09-12 10:00:12 +07:00
XMRig e9b20fff81 Implemented VM mode for OpenCL RandomX. 2019-09-12 00:01:03 +07:00
XMRig c4b49d4213 OpenCL RandomX WIP 2019-09-11 15:48:02 +07:00
SChernykh 0e34221026 Fix for 272 initialization threads 2019-09-09 08:15:46 +02:00
XMRig be5caf0701 Added OpenCL source. 2019-08-25 23:06:04 +07:00
XMRig b8982a4652 Start mining threads only after RandomX dataset initialization. 2019-08-25 20:28:15 +07:00
XMRig faf18262eb Added generic Argon2 implementation (conflicts with RandomX). 2019-08-16 00:31:29 +07:00
XMRig e49300b11d Uniform signature for hugePages method. 2019-08-10 13:14:20 +07:00
XMRig 3b22609ced Disable HW AES for RandomX on ARM. 2019-08-09 15:36:34 +07:00
XMRig 48afbdf971 Fix for previous commit. 2019-08-05 18:20:56 +07:00
XMRig f840ccb8a0 Fixed crash and added error message about seed_hash field. 2019-08-05 17:48:12 +07:00
XMRig 651d4326d3 Changed init signature. 2019-08-05 16:00:48 +07:00
XMRig e40b9deb6d Always stop mining threads in RandomX dataset change upcoming. 2019-08-02 16:44:55 +07:00
XMRig 98378d072d Optimized RandomX initialization and switching. 2019-08-01 20:37:05 +07:00
XMRig 93001f6418 Use std::thread and std:mutex instead of uv_thread_t and uv_mutex_t. 2019-07-30 21:25:27 +07:00
XMRig 876b2ff7a7 Fix hwloc deprecation warnings. 2019-07-28 10:15:20 +07:00
XMRig 4b6b2f1d7d Added "randomx" object to config. 2019-07-28 07:46:59 +07:00
XMRig afba358c63 Return correct hugePages count if NUMA mode used. 2019-07-27 21:31:11 +07:00
XMRig 70d9b6e793 Added support for allocate RandomX dataset on each NUMA node. 2019-07-27 19:41:59 +07:00
XMRig 066b1c483d Special case for Intel CPUs with 1 MB L2 cache per core. 2019-07-26 16:22:44 +07:00
XMRig e9db84be14 Fixed crash. 2019-07-25 19:27:12 +07:00
XMRig b88e5ce20e Fixed dataset initialization speed on Linux if thread affinity was used. 2019-07-25 19:11:07 +07:00
XMRig e78c8a564a Added option "init-threads". 2019-07-25 12:20:59 +07:00
XMRig ca23430933 "GET /1/threads" replaced to "GET /2/backends". 2019-07-19 04:22:21 +07:00
XMRig fb205e8cd3 Restored "CPU READY" message. 2019-07-17 14:54:08 +07:00
XMRig c8736cac5e Implemented unified cryptonight and RandomX scratchpad memory. 2019-07-17 04:33:11 +07:00
XMRig f14d3129f2 Fixed RandomX VM creation in some cases. 2019-07-10 10:26:10 +07:00
XMRig dc65b213a8 Added class RxVm. 2019-07-10 10:14:33 +07:00
XMRig e1edfa3312 Added classes Rx, RxAlgo, RxCache, RxDataset. 2019-07-10 01:53:05 +07:00