DragonX/xmrig-hac
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c7eab0c02b880c3807f2748b0cd6b65ff826985d
Commit Graph

169 Commits

Author SHA1 Message Date
XMRig
c084a1ebe0 Disallow direct use of HwlocCpuInfo class. 2023-06-07 00:32:09 +07:00
SChernykh
45c9f37b4a Fix: --randomx-wrmsr=-1 worked only on Intel 2023-02-26 22:31:55 +01:00
SChernykh
0c6d6b3070 Improved Zen 3 MSR mod 
+0.5% speedup on Ryzen 5 5600X
 2022-11-17 23:32:36 +01:00
SChernykh
5e680fa82a RandomX: added MSR mod for Zen 4 
+0.8% faster on Ryzen 9 7950X
 2022-10-01 18:33:04 +02:00
SChernykh
f329375360 RandomX: added Blake2 AVX2 version 
+0.1% speedup on AMD Zen2/Zen3 and Intel CPUs which support AVX2.
 2022-08-25 20:39:54 +02:00
SChernykh
1105f1130c RandomX: don't restart mining threads when the seed changes 
It helps to not loose huge pages when the seed changes (every 2048 blocks, ~2.8 days).
 2021-12-25 13:39:15 +01:00
SChernykh
fa9b5c7b6e GhostRider algorithm (Raptoreum) support 2021-11-23 08:14:01 +01:00
XMRig
871f616d72 Merge branch 'GraftRandomX' of https://github.com/Stardock2018/xmrig into pr2563 2021-08-28 11:50:17 +07:00
Chris
28c81ed18e Added Graft RandonX 2021-08-27 08:19:54 -06:00
XMRig
22f68bda8d Code cleanup based on Clang-Tidy. 2021-08-25 18:45:15 +07:00
XMRig
2d318425cf Removed shortName. 2021-08-11 22:26:34 +07:00
XMRig
48a43b9274 Implemented stable algorithm ids. 2021-08-11 03:46:34 +07:00
SChernykh
3e9755c8c8 Optimized cn-heavy for Zen3 
- Uses scratchpad interleaving to access only the closest L3 slice from each CPU core.
- Also activates MSR mod for cn-heavy because CPU prefetchers get confused with interleaving
- 7-8% speedup on Zen3
 2021-02-07 22:05:11 +01:00
SChernykh
e3828a13f9 Fixed crashes on ARM 2021-02-01 17:07:45 +01:00
XMRig
0444103fba Fixed Cache QoS restore on exit where it not supported. 2021-01-24 02:23:27 +07:00
XMRig
61d5f1aacb Added RxMsr class. 2021-01-23 23:23:39 +07:00
XMRig
8a64a827f7 Move Ryzen related fixes to RxFix class. 2021-01-23 00:27:56 +07:00
XMRig
0273ea7140 Added new class Msr. 2021-01-22 23:50:25 +07:00
Richard Mitsuk Lavitt
a8cbc72fd1 fixed grammar in a couple of awkward error messages 2021-01-15 14:33:38 -06:00
SChernykh
0319b5b622 Added config option for AVX2 dataset init 
-1 = Auto detect
0 = Always disabled
1 = Enabled if AVX2 is supported
 2020-12-19 16:18:49 +01:00
SChernykh
aaf1ed1c99 Dataset initialization with AVX2 (WIP) 2020-12-18 14:53:54 +01:00
SChernykh
83d152f557 More static analysis fixes 2020-12-08 16:05:58 +01:00
XMRig
4569eea6f6 Move Profiler and more cleanup. 2020-12-04 09:23:40 +07:00
XMRig
c8ebffd012 Added Cvt class. 2020-12-02 16:31:45 +07:00
SChernykh
78dba13722 Fix RandomX init when switching to other algo and back 2020-11-29 22:02:48 +01:00
SChernykh
bdb6fe7d05 Fixed MSR mod names in JSON API 2020-11-14 19:55:43 +01:00
XMRig
6e0e0fe22a #1937 Print path to existing WinRing0 service without verbose option. 2020-11-12 23:32:49 +07:00
SChernykh
648fa6f164 Separate MSR mod for Zen/Zen2 and Zen3 
Another +0.5% speedup for Zen2
 2020-11-08 19:40:44 +01:00
SChernykh
3fe06970b0 Update RxConfig.cpp 2020-11-06 22:59:18 +01:00
SChernykh
dc2a6ebd32 New MSR mod for Ryzen 
+3.5% on Zen2, +1-2% on Zen3
 2020-11-06 22:56:09 +01:00
SChernykh
4706136148 Fix compilation on ARMv8 with GCC 9.3.0 2020-11-02 13:50:10 +01:00
XMRig
66e7951d2b Merge branch 'feature-bench-submit' into dev 2020-10-30 23:25:09 +07:00
SChernykh
d822ffef36 Fixed Debug build in Visual Studio 2020-10-27 14:08:36 +01:00
XMRig
34a9aaf358 Added "msr" field for CPU backend. 2020-10-25 16:36:37 +07:00
cohcho
020d4acba2 MSR: supress kernel module warning 2020-10-23 13:09:13 +00:00
XMRig
c5b118ab4c New Async wrapper. 2020-10-21 08:09:44 +07:00
XMRig
572616f3d2 Code cleanup. 2020-10-16 19:35:36 +07:00
cohcho
7b98814d02 uv: fix performance issue 
unix implementation of uv_async_t has been wasting cpu cycles for nothing since 1.29.0 release
implement efficient callback scheduling for linux
 2020-10-12 04:09:09 +00:00
SChernykh
1865d31d0c RandomX: added huge-pages-jit config parameter 
Set to false by default, gives 0.2% boost on Ryzen 7 3700X with 16 threads, but hashrate might be unstable on Ryzen between launches. Use with caution.
 2020-10-07 17:42:55 +02:00
SChernykh
6a25fa75c7 RandomX: allocate 2 MB pages for generated code, if possible 
+0.2% boost on Ryzen 7 3700X
 2020-10-07 10:35:10 +02:00
cohcho
e6e4519d96 RxVm: fix randomx_create_vm call 
randomx_create_vm requires either cache or dataset, but not both
 2020-10-06 19:45:43 +00:00
xmrig
3f85d142d9 Merge pull request #1864 from cohcho/soft_aes_optimization2 
soft_aes: fix previous optimization
 2020-10-05 12:20:41 +07:00
cohcho
a5f4548b27 soft_aes: fix previous optimization 
Previously removed unrolled variant is faster on some CPUs
Some CPUs are faster with added unrolled variant
The best variant depends on number of threads on some CPUs
 2020-10-04 14:47:58 +00:00
SChernykh
d5dd4ce89f RandomX: removed rx/loki 
Loki forks to PoS on October 9th.
 2020-10-02 17:02:52 +02:00
XMRig
92835b608f Renamed WITH_SSE to WITH_SSE4_1 and make it work on all platforms. 2020-10-01 11:00:08 +07:00
SChernykh
3ef7c9b5e6 RandomX: returned old soft AES impl and auto-select between the two 2020-09-15 20:48:27 +02:00
SChernykh
f126fa112e RandomX: added performance profiler (for developers) 
Also optimized Blake2b SSE4.1 code size to avoid code cache pollution.
 2020-09-12 23:07:52 +02:00
SChernykh
9a53285c5f RandomX: added SSE4.1-optimized Blake2b 
+0.15% on `rx/0`
+0.3% on `rx/wow`
 2020-09-10 14:28:40 +02:00
SChernykh
f26d4274fc RandomX: added parameter for scratchpad prefetch mode 
`scratchpad_prefetch_mode` can have 4 values:
0: off
1: use `prefetcht0` instruction (default, same as previous XMRig versions)
2: use `prefetchnta` instruction (faster on Coffee Lake and a few other CPUs)
3: use `mov` instruction
 2020-09-04 16:16:07 +02:00
XMRig
42576e91dc Fix compile warning. 2020-08-23 14:22:08 +07:00