Commit Graph

1243 Commits

Author SHA1 Message Date
XMRig
e0a9c69ab9 Rename Rx_windows.cpp to Rx_win.cpp. 2019-12-17 15:16:37 +07:00
XMRig
b25d6d5f67 Added RandomX option "rdmsr" and save/restore MSR registers on Windows. 2019-12-17 14:45:01 +07:00
XMRig
efb63d15e1 Added support for write custom MSR. 2019-12-17 02:27:07 +07:00
XMRig
2371c7acde #1421 Use dynamic size send buffer. 2019-12-16 14:09:03 +07:00
XMRig
28c9cdd4da #1423 Implemented driver reuse. 2019-12-16 03:41:58 +07:00
XMRig
2f6432751c Strict wrmsr error handling. 2019-12-16 02:45:07 +07:00
XMRig
ca8708319f Revert changes. 2019-12-16 02:17:57 +07:00
SChernykh
a1d359f045 Use unique service name for WinRing0 driver
To avoid error 1072
2019-12-15 19:28:14 +01:00
XMRig
f2e16d7a2d v5.3.1-dev 2019-12-16 00:17:08 +07:00
xmrig
4108ab0ebe Merge pull request #1418 from jtgrassie/buffer-size
increase stratum send buffer size
2019-12-15 15:38:27 +07:00
XMRig
b54843dabd v5.3.0 2019-12-15 15:34:27 +07:00
Jethro Grassie
fb3315c7bb increase stratum send buffer size 2019-12-15 03:23:07 -05:00
XMRig
34f84582d0 Removed unnecessary check. 2019-12-15 12:02:45 +07:00
XMRig
3fad0b0c31 Added missing tag. 2019-12-15 01:52:20 +07:00
XMRig
6d9e1a50cc Unified Linux/Windows MSR log messages. 2019-12-15 01:32:41 +07:00
xmrig
e5d8763662 Merge pull request #1416 from SChernykh/dev
Fixed thread count for MSR mod
2019-12-14 22:41:00 +07:00
SChernykh
53919c1281 Fixed thread count for MSR mod 2019-12-14 16:30:46 +01:00
XMRig
db91600223 v5.3.0-dev 2019-12-14 22:30:41 +07:00
XMRig
c1d2bb1219 Merge branch 'master' into dev 2019-12-14 22:29:57 +07:00
SChernykh
5cf846b28d MSR mod for Windows 2019-12-14 16:04:37 +01:00
XMRig
e76e2031fa v5.2.1 2019-12-14 13:15:19 +07:00
XMRig
2f19cddc9f Added additional MSR registers for Ryzen CPUs. 2019-12-12 14:21:15 +07:00
XMRig
7acb7ddbc9 Fixed potential division by 0. 2019-12-12 14:09:18 +07:00
XMRig
86e5ab861b Don't build Rx_linux.cpp on ARM. 2019-12-11 21:20:37 +07:00
XMRig
6d176d2013 Fixed MSR. 2019-12-11 20:09:25 +07:00
XMRig
7a507a2c8a Added support for AMD specific MSR registers. 2019-12-11 19:37:13 +07:00
XMRig
79a7d91166 Fixed --randomx-wrmsr option without parameters. 2019-12-11 19:16:01 +07:00
XMRig
bb5887866c v5.2.1 2019-12-11 17:58:44 +07:00
XMRig
7e578b76ab v5.2.0 2019-12-11 14:06:53 +07:00
XMRig
f960d1cf16 Added RandomX option "wrmsr" with command line equivalent --randomx-wrmsr=N. 2019-12-10 23:57:29 +07:00
XMRig
e1171d3ae7 Added CPU vendor enum. 2019-12-10 12:49:42 +07:00
XMRig
4b3ab4f99a Added command line option --randomx-1gb-pages 2019-12-10 11:56:31 +07:00
SChernykh
9629001fe4 Update jit_compiler_x86_static.S 2019-12-09 20:30:37 +01:00
SChernykh
7e724aa70d More optimizations for Ryzen 2019-12-09 20:29:05 +01:00
SChernykh
e35ce64e14 Fixed assembly selection for RandomX when it's on Auto 2019-12-09 18:59:49 +01:00
XMRig
fbd39ca49d Move "1gb-pages" option to "randomx" object. 2019-12-09 21:42:40 +07:00
XMRig
29029028cf Added missing Cpu::release call. 2019-12-09 01:07:42 +07:00
XMRig
09bad67a85 v5.2.0-dev 2019-12-08 23:23:03 +07:00
XMRig
280618a9eb Memory allocation refactoring. 2019-12-08 23:17:39 +07:00
SChernykh
08eef1bf9a Fix GCC compilation 2019-12-08 16:51:37 +01:00
SChernykh
8a1679ec89 Fixed indentation 2019-12-08 16:20:46 +01:00
SChernykh
2ed2629653 Optimized dataset read for Ryzen CPUs
Removed register dependency in dataset read, +0.8% speedup on average.
2019-12-08 16:14:02 +01:00
XMRig
2c2912ddba Fix summary. 2019-12-08 14:30:44 +07:00
XMRig
6bba6eadb9 New summary information about 1GB pages. 2019-12-08 14:21:28 +07:00
XMRig
2979e0c075 Fixed build without hwloc. 2019-12-08 10:20:23 +07:00
XMRig
0c926c5f57 #1385 "max-threads-hint" option now also limit RandomX dataset initialization threads. 2019-12-07 22:18:06 +07:00
XMRig
5d6abe4ae6 #1386 Added priority for RandomX dataset initialization threads. 2019-12-06 22:17:04 +07:00
SChernykh
46e3823d3f Fixed compilation on systems without 1GB pages support 2019-12-06 13:55:33 +01:00
SChernykh
c188d885ee Fix ARM compilation 2019-12-06 13:43:59 +01:00
XMRig
209f485f70 Removed strdup from FileLog. 2019-12-06 11:56:13 +07:00