DragonX/xmrig-hac
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extranonce
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Author SHA1 Message Date
DanS f9d6bcad5e extranonce 2026-05-20 11:14:46 -05:00
DanS 24232d72c3 Add top-level build.sh release script v6.25.0 2026-03-10 20:26:13 -05:00
DanS 7d22bc2bb5 Add dual SHA256D block check for pool mining mode 
Pool sends block_target (full 256-bit network target) with each job.
Miner checks SHA256D(header + RandomX solution) for every hash against
the block target, enabling block detection at full hashrate instead of
only on submitted shares.
 2026-03-09 23:52:34 -05:00
DanS 95d3ff2c4a Fixing miner issues 
- Switch from full-block to header-only (140-byte) RandomX input
- Add 32-byte SoloNonce system for solo mining mode
- Compute proper difficulty target from compact bits field
- Add SHA256D dual-hash PoW check in CpuWorker for solo mining
- Raise RandomX dataset/scratchpad limits to 4GB/4MB
- Use standard RandomX share filtering in pool (stratum) mode
 2026-03-05 06:00:55 -06:00
DanS a27a1e327b cleanup 2026-02-28 00:33:09 -06:00
DanS c94352d305 Prepare XMRig-HAC fork for public release 
- Add DragonX coin and rx/hush algorithm support
- Update branding to XMRig-HAC / dragonx.is
- Update repository URLs to git.hush.is
- Replace example wallet addresses with placeholders
- Update .gitignore for build directories
- Document fork changes in README and CHANGELOG
 2026-02-26 23:48:10 -06:00
DanS fc8286800d HAC changes 2026-01-27 16:45:21 -06:00
XMRig fd08510c60 v6.25.0 2025-12-23 19:44:52 +07:00
XMRig f20cfedf0c Merge branch 'dev' 2025-12-23 19:44:21 +07:00
XMRig cb9f597549 v6.25.0-dev 2025-12-23 19:37:24 +07:00
xmrig 4c096fe9a1 Merge pull request #3743 from SChernykh/dev 
Linux: added support for transparent huge pages
 2025-12-12 01:20:03 +07:00
SChernykh 08d1b6583c Linux: added support for transparent huge pages 2025-12-11 11:23:18 +01:00
xmrig b2444e2956 Merge pull request #3740 from SChernykh/dev 
RISC-V: added vectorized soft AES
 2025-12-06 19:39:47 +07:00
SChernykh b1e07859d3 RISC-V: added vectorized soft AES 2025-12-05 21:09:22 +01:00
xmrig 3038fcb16e Merge pull request #3736 from SChernykh/dev 
RISC-V: added vectorized dataset init
 2025-12-01 10:46:03 +07:00
SChernykh 92f8357338 RISC-V: added vectorized dataset init (activated by setting init-avx2 to 1 in config.json) 2025-11-30 19:15:15 +01:00
xmrig 3851aeee77 Merge pull request #3733 from void-512/master 
Add detection for MSVC/2026
 2025-11-13 15:52:43 +07:00
Tony Wang 189fde773e add detection for MSVC/2026 2025-11-12 17:32:57 -05:00
XMRig f4080ed9a7 Improved compatibility for automatically enabling huge pages on Linux systems without NUMA support. 2025-11-07 01:55:00 +07:00
xmrig 48734a97e2 Merge pull request #3731 from user0-07161/dev-haiku-os-support 
feat: initial haiku os support
 2025-11-05 18:47:22 +07:00
user0-07161 1a4a3dd240 feat: initial support for haiku 2025-11-04 13:58:01 +00:00
XMRig eabccd7092 Cleanup 2025-10-27 19:18:52 +07:00
XMRig 6e295046a4 Fixed macOS build. 2025-10-23 11:17:59 +07:00
xmrig 5f5ed9e823 Merge pull request #3725 from SChernykh/dev 
RISC-V integration and JIT compiler
 2025-10-23 11:02:21 +07:00
SChernykh f28d200846 Removed unused files 2025-10-22 23:31:02 +02:00
SChernykh 501152e73a RISC-V: test for instruction extensions 2025-10-22 19:21:26 +02:00
SChernykh 13735345ea RISC-V JIT compiler 2025-10-22 19:00:20 +02:00
slayingripper b53008fed6 RISC-V Intergration 2025-10-22 18:57:20 +02:00
xmrig c56fc2e989 Merge pull request #3722 from SChernykh/dev 
Added Zen4 (Hawk Point) CPUs detection
 2025-10-15 13:23:36 +07:00
SChernykh 94eee94b69 Added Zen4 (Hawk Point) CPUs detection 2025-10-15 08:07:58 +02:00
xmrig c2c191e5cc Merge pull request #3719 from SChernykh/dev 
Fix: correct FCMP++ version number
 2025-10-05 18:28:21 +07:00
SChernykh 1038075c65 Fix: correct FCMP++ version number 2025-10-05 13:24:55 +02:00
xmrig ee9e897dd5 Merge pull request #3718 from SChernykh/dev 
Solo mining: added support for FCMP++ hardfork
 2025-10-05 18:04:23 +07:00
SChernykh 2f5d0de8c8 Solo mining: added support for FCMP++ hardfork 2025-10-05 13:00:21 +02:00
XMRig a60aee39b4 Merge branch 'xtophyr-master' into dev 2025-09-22 21:31:28 +07:00
XMRig 4df8505653 Merge branch 'master' of https://github.com/xtophyr/xmrig into xtophyr-master 2025-09-22 21:31:14 +07:00
Christopher Wright ee604fb8dd adjust instruction/register suffixes to compile with gcc-based assemblers. 2025-09-21 14:57:42 -04:00
Christopher Wright 311fd2e462 undo this change 2025-09-20 08:38:40 -04:00
Christopher Wright acbf175891 minor Aarch64 JIT changes (better instruction selection, don't emit instructions that add 0, etc) 2025-09-20 08:32:32 -04:00
XMRig e78716ef05 Merge branch 'dev' of github.com:xmrig/xmrig into dev 2025-06-29 12:29:01 +07:00
XMRig 1c70cd4557 Improved LibreSSL support. 2025-06-29 12:28:35 +07:00
xmrig d4c35427a0 Merge pull request #3680 from benthetechguy/armhf 
Add armv8l to list of 32 bit ARM targets
 2025-06-25 04:14:22 +07:00
Ben Westover 4651aba2db Add armv8l to list of 32 bit ARM targets 
armv8l is what CMAKE_SYSTEM_PROCESSOR is set to when an ARMv8 processor
is in 32-bit mode, so it should be added to the ARMv7 target list even
though it's v8 because it's 32 bits. Currently, it's not in any ARM
target list which means x86 is assumed and the build fails.
 2025-06-24 15:28:01 -04:00
XMRig 695575625e v6.24.1-dev 2025-06-23 08:37:15 +07:00
XMRig 829aad0acc Merge branch 'master' into dev 2025-06-23 08:36:52 +07:00
XMRig df4ada0fa3 v6.24.0 2025-06-23 07:44:53 +07:00
XMRig fb32f5a91c Merge branch 'dev' 2025-06-23 07:44:05 +07:00
xmrig 08ead30b2d Update CHANGELOG.md 2025-06-23 05:39:26 +07:00
XMRig 171a3853e4 More DNS cleanup. 2025-06-20 23:45:53 +07:00
XMRig 37dae66dee v6.24.0-dev 2025-06-20 08:34:58 +07:00