xmrig
b5833a280f
Merge pull request #1807 from SChernykh/dev
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RandomX JIT: optimized address mask calculation
2020-08-12 21:48:20 +07:00
SChernykh
07d9abc90e
RandomX JIT: optimized address mask calculation
2020-08-12 16:45:16 +02:00
XMRig
c84a555e17
Merge branch 'dev' of github.com:xmrig/xmrig into dev
2020-08-07 21:55:06 +07:00
XMRig
660096ebb5
Fixed rare protocol error in HTTP client.
2020-08-07 21:54:22 +07:00
xmrig
67bce50132
Update CHANGELOG.md
2020-08-01 13:02:11 +07:00
XMRig
d3ddb76962
Fixed RandomX cache initialization if 1GB pages fails to allocate on a first NUMA node.
2020-08-01 12:30:02 +07:00
xmrig
fbf78d2789
Merge pull request #1794 from SChernykh/dev
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More robust 1 GB pages handling
2020-07-31 20:45:27 +07:00
SChernykh
3d78f30171
Try to allocate scratchpad from dataset's 1 GB huge pages, if normal huge pages are not available
2020-07-31 13:37:22 +02:00
XMRig
5ce47b764d
v6.3.2-dev
2020-07-31 16:50:23 +07:00
XMRig
a0b9fb1fe6
Merge branch 'master' into dev
2020-07-31 16:48:54 +07:00
SChernykh
5aae95eddc
Force 2 MB pages size in allocateLargePagesMemory() on Linux
2020-07-31 09:55:49 +02:00
XMRig
25797edb22
v6.3.1
2020-07-31 13:20:56 +07:00
XMRig
847352a698
Merge branch 'dev'
2020-07-31 13:20:11 +07:00
xmrig
097afe7f23
Update CHANGELOG.md
2020-07-31 13:16:58 +07:00
xmrig
f6ab14cebe
Merge pull request #1792 from SChernykh/dev
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Fixed crash in RelWithDbgInfo MSVC build
2020-07-29 15:42:09 +07:00
SChernykh
3c383c59dc
Fixed crash in RelWithDbgInfo MSVC build
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Same problem as in https://github.com/xmrig/xmrig/pull/1784 , fixed with compiler flags this time.
2020-07-29 10:39:58 +02:00
XMRig
9829da5d4e
Added command line option --pause-on-battery and renamed config option.
2020-07-23 15:45:01 +07:00
XMRig
7d65aa8ed7
Add tags
2020-07-23 10:26:56 +07:00
xmrig
f478fa5e55
Merge pull request #1786 from SChernykh/dev
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Added mining on battery setting
2020-07-23 09:20:06 +07:00
SChernykh
8c8a46acb8
Added mining on battery setting
2020-07-22 20:21:42 +02:00
XMRig
b2b54cbe82
Cleanup
2020-07-22 21:27:40 +07:00
XMRig
c5709e1822
Cleanup usage output.
2020-07-22 19:58:08 +07:00
xmrig
ec379da3fd
Update README.md
2020-07-22 09:14:25 +07:00
xmrig
675cff11a4
Merge pull request #1784 from SChernykh/dev
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Fixed RandomX initialization for VS debug builds
2020-07-21 19:04:02 +07:00
SChernykh
51370682f3
Fixed RandomX initialization for VS debug builds
2020-07-21 10:10:07 +02:00
XMRig
3526c1335d
Added command line options --cache-qos (--randomx-cache-qos) and --argon2-impl (--cpu-argon2-impl).
2020-07-20 09:17:59 +07:00
XMRig
8a2b91fbea
v6.3.1-dev
2020-07-17 03:13:02 +07:00
XMRig
ce3e5eccfe
Merge branch 'master' into dev
2020-07-17 03:12:36 +07:00
XMRig
b89d6da67d
v6.3.0
2020-07-17 00:17:55 +07:00
XMRig
c454d81aaf
Merge branch 'dev'
2020-07-17 00:17:24 +07:00
XMRig
8a74126af9
v6.3.0-dev
2020-07-17 00:04:31 +07:00
XMRig
8c25eab8dd
Sync changes with the proxy.
2020-07-16 23:29:21 +07:00
xmrig
546051d631
Merge pull request #1780 from SChernykh/dev
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Cryptonight OpenCL: fix for long input data
2020-07-16 19:56:20 +07:00
SChernykh
3180e242a9
Cryptonight OpenCL: fix for long input data
2020-07-16 10:39:32 +02:00
XMRig
da244e7acf
Fixed build without MSR support.
2020-07-16 05:15:35 +07:00
XMRig
a97bfe3cc4
Merge branch 'haven-protocol-org-master' into dev
2020-07-15 23:33:53 +07:00
XMRig
cab29e4103
Merge branch 'master' of https://github.com/haven-protocol-org/xmrig into haven-protocol-org-master
2020-07-15 23:33:17 +07:00
Neil Coggins
83bb040bf3
Increased max blob size to support Haven offshore capability
2020-07-14 11:52:43 +01:00
xmrig
59c3ebd48e
Merge pull request #1776 from SChernykh/dev
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Removed cache QoS warning at exit on unsupported CPUs
2020-07-14 01:45:18 +07:00
SChernykh
e8dbb8ca9f
Removed cache QoS warning at exit on unsupported CPUs
2020-07-13 20:43:49 +02:00
xmrig
6d01860812
Merge pull request #1774 from SChernykh/dev
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RandomX: added cache QoS support
2020-07-14 01:35:46 +07:00
SChernykh
a3f4d91ad7
Cache QoS: fix for seting MSR
2020-07-13 20:30:44 +02:00
SChernykh
5af50b854c
RandomX: added cache QoS support
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False by default. If set to true, all non-mining CPU cores will not have access to L3 cache.
2020-07-13 17:23:18 +02:00
xmrig
af91d1a57e
Merge pull request #1771 from jserv/update-sse2neon
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Adopt new SSE2NEON and reduce ARM-specific changes
2020-07-11 02:32:56 +07:00
Jim Huang
3343e373e8
Adopt new SSE2NEON and reduce ARM-specific changes
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This patch updated SSE2NEON [1], which contains more functions
provided by Intel intrinsics, only implemented with NEON-based
counterparts to produce the exact semantics of the intrinsics.
Consequently, ARM-specific changes against CryptoNight_arm can
be reduced as well.
[1] https://github.com/DLTcollab/sse2neon/
2020-07-11 01:55:11 +08:00
XMRig
8726bf1494
v6.2.4-dev
2020-07-10 03:12:00 +07:00
XMRig
fbe39ad6ff
Merge branch 'master' into dev
2020-07-10 02:49:33 +07:00
XMRig
2f65f7f691
v6.2.3
2020-07-09 22:24:35 +07:00
XMRig
55eb9e5748
Merge branch 'dev'
2020-07-09 22:24:01 +07:00
xmrig
bae24e8dcd
Update CHANGELOG.md
2020-07-09 22:23:16 +07:00
